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HL$ eH3 %( Dt H([]A\A]A^A_USH Hx H` H@ H H1 H| H H uH= [] 7[nandsim] debug: read_word
STATE_CMD_READ0 STATE_CMD_READ1 STATE_CMD_PAGEPROG STATE_CMD_READOOB STATE_CMD_READSTART STATE_CMD_ERASE1 STATE_CMD_STATUS STATE_CMD_SEQIN STATE_CMD_READID STATE_CMD_ERASE2 STATE_CMD_RESET STATE_CMD_RNDOUT STATE_CMD_RNDOUTSTART STATE_ADDR_PAGE STATE_ADDR_SEC STATE_ADDR_ZERO STATE_ADDR_COLUMN STATE_DATAIN STATE_DATAOUT STATE_DATAOUT_ID STATE_DATAOUT_STATUS STATE_READY STATE_UNKNOWN Number of erase blocks: %u
7[nandsim] log: reset chip
wear_report NAND simulator partition %d flash size: %llu MiB
page size: %u bytes
OOB area size: %u bytes
sector size: %u KiB
pages number: %u
pages per sector: %u
bus width: %u
bits in sector size: %u
bits in page size: %u
bits in OOB size: %u
page address bytes: %u
sector address bytes: %u
options: %#x
nandsim 3[nandsim] error: get_state_name: unknown state, BUG
7[nandsim] debug: switch_to_ready_state: switch to %s state
3[nandsim] error: get_state_by_command: unknown command, BUG
7[nandsim] debug: device_ready
3[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY
3[nandsim] error: write_buf: too many input bytes
7[nandsim] debug: write_buf: %d bytes were written
Total numbers of erases: %lu
Average number of erases: %lu
Maximum number of erases: %lu
Minimum number of erases: %lu
Number of ebs with erase counts from %lu to %lu : %lu
4[nandsim] warning: simulating read error in page %u
4[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u
4[nandsim] warning: do_state_action: wrong page number (%#x)
3[nandsim] error: do_state_action: column number is too large
7[nandsim] debug: read_page: page %d not written
7[nandsim] debug: read_page: page %d written, reading from %d
3[nandsim] error: read_page: read error for page %d ret %ld
7[nandsim] debug: read_page: page %d not allocated
7[nandsim] debug: read_page: page %d allocated, reading from %d
7[nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d
7[nandsim] log: read page %d
7[nandsim] log: read page %d (second half)
7[nandsim] log: read OOB of page %d
3[nandsim] error: do_state_action: device is write-protected, ignore sector erase
3[nandsim] error: do_state_action: wrong sector address (%#x)
7[nandsim] debug: do_state_action: erase sector at address %#x, off = %d
7[nandsim] log: erase sector %u
7[nandsim] debug: erase_sector: freeing page %d
3[nandsim] error: Erase counter total overflow
3[nandsim] error: Erase counter overflow for erase block %u
4[nandsim] warning: do_state_action: device is write-protected, programm
3[nandsim] error: do_state_action: too few bytes were input (%d instead of %d)
7[nandsim] debug: prog_page: writing page %d
3[nandsim] error: prog_page: read error for page %d ret %ld
3[nandsim] error: prog_page: write error for page %d ret %ld
7[nandsim] debug: prog_page: allocating page %d
3[nandsim] error: prog_page: error allocating memory for page %d
7[nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d
7[nandsim] log: programm page %d
7[nandsim] debug: do_state_action: set internal offset to 0
3[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips
7[nandsim] debug: do_state_action: set internal offset to %d
7[nandsim] debug: do_state_action: BUG! unknown action
4[nandsim] warning: simulating erase failure in erase block %u
4[nandsim] warning: simulating write failure in page %u
7[nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s
7[nandsim] debug: find_operation: no operation found, try again with state %s
7[nandsim] debug: find_operation: no operations found
7[nandsim] debug: find_operation: BUG, operation must be known if address is input
7[nandsim] debug: find_operation: there is still ambiguity
7[nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s
7[nandsim] debug: switch_state: operation is unknown, try to find it
7[nandsim] debug: switch_state: double the column number for 16x device
4[nandsim] warning: switch_state: not all bytes were processed, %d left
7[nandsim] debug: switch_state: operation complete, switch to STATE_READY state
7[nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s
3[nandsim] error: switch_state: BUG! unknown data state
3[nandsim] error: switch_state: BUG! unknown address state
3[nandsim] error: read_buf: chip is disabled
3[nandsim] error: read_buf: ALE or CLE pin is high
4[nandsim] warning: read_buf: unexpected data output cycle, current state is %s
3[nandsim] error: read_buf: too many bytes to read
3[nandsim] error: read_byte: chip is disabled, return %#x
3[nandsim] error: read_byte: ALE or CLE pin is high, return %#x
4[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x
7[nandsim] debug: read_byte: return %#x status
4[nandsim] warning: read_byte: no more data to output, return %#x
7[nandsim] debug: read_byte: read ID byte %d, total = %d
/build/linux-kugvA8/linux-4.9.320/drivers/mtd/nand/nandsim.c 7[nandsim] debug: read_byte: all bytes were read
3[nandsim] error: write_byte: chip is disabled, ignore write
3[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write
4[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states
7[nandsim] debug: command byte corresponding to %s state accepted
7[nandsim] debug: write_byte: operation isn't known yet, identify it
3[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY
3[nandsim] error: write_byte: no more address bytes expected
7[nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected)
7[nandsim] debug: address (%#x, %#x) is accepted
3[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s
4[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write
3[nandsim] error: write_byte: unknown command %#x
3[nandsim] error: wrong bus width (%d), use only 8 or 16
3[nandsim] error: unable to allocate core structures.
3[nandsim] error: bbt has to be 0..2
3[nandsim] error: invalid weakblocks.
3[nandsim] error: unable to allocate memory.
3[nandsim] error: invalid weakpagess.
3[nandsim] error: invalid gravepagess.
3[nandsim] error: cannot scan NAND Simulator device
3[nandsim] error: bch not available on small page devices
3[nandsim] error: invalid bch value %u
6[nandsim] using %u-bit/%u bytes BCH ECC
3[nandsim] error: can't register NAND Simulator
3[nandsim] error: overridesize is too big
3[nandsim] error: Too many erase blocks for wear reporting
3[nandsim] error: cannot create "nandsim" debugfs directory, err %d
3[nandsim] error: init_nandsim: nandsim is already initialized
3[nandsim] error: init_nandsim: unknown page size %u
3[nandsim] error: too many partitions.
3[nandsim] error: bad partition size.
4[nandsim] warning: 16-bit flashes support wasn't tested
flash size with OOB: %llu KiB
3[nandsim] error: alloc_device: cache file not readable
3[nandsim] error: alloc_device: cache file not writeable
3[nandsim] error: alloc_device: unable to allocate pages written array
3[nandsim] error: alloc_device: unable to allocate file buf
3[nandsim] error: alloc_device: unable to allocate page array
3[nandsim] error: cache_create: unable to create kmem_cache
3[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer
3[nandsim] error: invalid badblocks.
description=The NAND flash simulator author=Artem B. Bityuckiy license=GPL parm=bch:Enable BCH ecc and set how many bits should be correctable in 512-byte blocks parm=bbt:0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area parm=cache_file:File to use to cache nand pages instead of memory parm=overridesize:Specifies the NAND Flash size overriding the ID bytes. The size is specified in erase blocks and as the exponent of a power of two e.g. 5 means a size of 32 erase blocks parm=gravepages:Pages that lose data [: maximum reads (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be read only twice before failing parm=bitflips:Maximum number of random bit flips per page (zero by default) parm=weakpages:Weak pages [: maximum writes (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be written only twice before failing parm=weakblocks:Weak erase blocks [: remaining erase cycles (defaults to 3)] separated by commas e.g. 113:2 means eb 113 can be erased only twice before failing parm=badblocks:Erase blocks that are initially marked bad, separated by commas parm=parts:Partition sizes (in erase blocks) separated by commas parm=dbg:Output debug information if not zero parm=log:Perform logging if not zero parm=do_delays:Simulate NAND delays using busy-waits if not zero parm=bus_width:Chip's bus width (8- or 16-bit) parm=input_cycle:Word input (to flash) time (nanoseconds) parm=output_cycle:Word output (from flash) time (nanoseconds) parm=erase_delay:Sector erase delay (milliseconds) parm=programm_delay:Page programm delay (microseconds parm=access_delay:Initial page access delay (microseconds) parm=fourth_id_byte:The fourth byte returned by NAND Flash 'read ID' command (obsolete) parm=third_id_byte:The third byte returned by NAND Flash 'read ID' command (obsolete) parm=second_id_byte:The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete) parm=first_id_byte:The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete) parm=id_bytes:The ID bytes returned by NAND Flash 'read ID' command parmtype=bch:uint parmtype=bbt:uint parmtype=cache_file:charp parmtype=overridesize:uint parmtype=gravepages:charp parmtype=bitflips:uint parmtype=weakpages:charp parmtype=weakblocks:charp parmtype=badblocks:charp parmtype=parts:array of ulong parmtype=dbg:uint parmtype=log:uint parmtype=do_delays:uint parmtype=bus_width:uint parmtype=input_cycle:uint parmtype=output_cycle:uint parmtype=erase_delay:uint parmtype=programm_delay:uint parmtype=access_delay:uint parmtype=fourth_id_byte:byte parmtype=third_id_byte:byte parmtype=second_id_byte:byte parmtype=first_id_byte:byte parmtype=id_bytes:array of byte depends=mtd,nand retpoline=Y intree=Y vermagic=4.9.0-19-amd64 SMP mod_unload modversions bch bbt cache_file overridesize gravepages bitflips weakpages weakblocks badblocks parts dbg log do_delays bus_width input_cycle output_cycle erase_delay programm_delay access_delay fourth_id_byte third_id_byte second_id_byte first_id_byte id_bytes o module_layout 4 param_ops_byte D param_ops_ulong U{ param_array_ops l param_ops_charp Z-$ param_ops_uint $- single_release H seq_read seq_lseek !g debugfs_remove_recursive n f mtd_device_parse_register (V mtd_block_markbad kmem_cache_create h vmalloc I@ vzalloc 3) filp_open D kasprintf \ debugfs_create_file K nand_release a3 debugfs_create_dir U nand_scan_tail )oy nand_scan_ident C __list_add ) simple_strtoul / kmem_cache_alloc __const_udelay k} __udelay ŏW memset 6Or kernel_write r | kernel_read f@ current_task 地 __kmalloc Y5 prandom_u32 9 prandom_bytes J put_zone_device_page &, __put_page write_inode_now J unlock_page l~_ pagecache_get_page [D! list_del A kmem_cache_destroy , kmem_cache_free 2 filp_close vfree z kfree s __stack_chk_fail seq_printf = single_open 8߬i memcpy I' printk \ɢ. __x86_indirect_thunk_rax m __fentry__ @ @ P ` @ P ` 0 0
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